--- src-8.8.25-orig/lib/modules/fglrx/build_mod/agpgart_be.c	2004-12-14 18:55:47.000000000 +0100
+++ src-8.8.25/lib/modules/fglrx/build_mod/agpgart_be.c	2005-01-18 21:08:14.000000000 +0100
@@ -117,6 +117,10 @@
 #include <linux/miscdevice.h>
 #include <linux/pm.h>
 
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,9)
+#define pci_find_class pci_get_class
+#endif
+
 #if (LINUX_VERSION_CODE >= 0x020400)
 #define FGL_PM_PRESENT
 #else
@@ -255,6 +259,12 @@
 }
 #endif
 
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
+#define firegl_pci_find_class(class,from) pci_get_class(class,from)
+#else
+#define firegl_pci_find_class(class,from) pci_find_class(class,from)
+#endif
+
 int agp_backend_acquire(void)
 {
 	if (agp_bridge.type == NOT_SUPPORTED) {
@@ -718,7 +728,7 @@
 	 *        AGP devices and collect their data.
 	 */
 
-	while ((device = pci_find_class(PCI_CLASS_DISPLAY_VGA << 8,
+	while ((device = firegl_pci_find_class(PCI_CLASS_DISPLAY_VGA << 8,
 					device)) != NULL) {
 		pci_read_config_dword(device, 0x04, &scratch);
 
@@ -794,6 +804,12 @@
 				command &= ~0x00000001;
 		}
 	}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
+	if(device)
+		pci_dev_put(device);
+#endif
+
 	/*
 	 * PASS2: Figure out the 4X/2X/1X setting and enable the
 	 *        target (our motherboard chipset).
@@ -839,7 +855,7 @@
 	 *        command registers.
 	 */
 
-	while ((device = pci_find_class(PCI_CLASS_DISPLAY_VGA << 8,
+	while ((device = firegl_pci_find_class(PCI_CLASS_DISPLAY_VGA << 8,
 					device)) != NULL) {
 		pci_read_config_dword(device, 0x04, &scratch);
 
@@ -870,6 +886,10 @@
 			pci_write_config_dword(device, cap_ptr + 8, command);
         }
 	}
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
+	if(device)
+		pci_dev_put(device);
+#endif
 
     return 0; /* success */
 }
@@ -5119,7 +5139,7 @@
 	 *        AGP devices and collect their data.
 	 */
 
-	while ((device = pci_find_class(PCI_CLASS_DISPLAY_VGA << 8,
+	while ((device = firegl_pci_find_class(PCI_CLASS_DISPLAY_VGA << 8,
 					device)) != NULL) {
 		pci_read_config_dword(device, 0x04, &scratch);
 
@@ -5187,6 +5207,12 @@
 				command &= ~0x00000001;
 		}
 	}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
+	if (device)
+		pci_dev_put(device);
+#endif
+
 	/*
 	 * PASS2: Figure out the 4X/2X/1X setting and enable the
 	 *        target (our motherboard chipset).
@@ -5217,7 +5243,7 @@
 	 *        command registers.
 	 */
 
-	while ((device = pci_find_class(PCI_CLASS_DISPLAY_VGA << 8,
+	while ((device = firegl_pci_find_class(PCI_CLASS_DISPLAY_VGA << 8,
 					device)) != NULL) {
 		pci_read_config_dword(device, 0x04, &scratch);
 
@@ -5249,6 +5275,11 @@
         }
 	}
 
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
+	if (device)
+		pci_dev_put(device);
+#endif
+
     return(0); /* success */
 }
 
@@ -6494,10 +6525,10 @@
     // locate host bridge device
 #ifdef __x86_64__
     do {
-        dev = pci_find_class(PCI_CLASS_BRIDGE_HOST << 8, dev);
+        dev = firegl_pci_find_class(PCI_CLASS_BRIDGE_HOST << 8, dev);
     } while((dev) && !agp_check_supported_device(dev));
 #else
-    if ((dev = pci_find_class(PCI_CLASS_BRIDGE_HOST << 8, NULL)) == NULL)
+    if ((dev = firegl_pci_find_class(PCI_CLASS_BRIDGE_HOST << 8, NULL)) == NULL)
         return -ENODEV;
 #endif
 
@@ -7040,8 +7071,14 @@
                     &agp_bridge.mode);
 				return hp_zx1_setup(dev);
 			}
-			dev = pci_find_class(PCI_CLASS_BRIDGE_HOST << 8, dev);
+			dev = firegl_pci_get_class(PCI_CLASS_BRIDGE_HOST << 8, dev);
 		} while (dev);
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
+		if(dev)
+			pci_dev_put(dev);
+#endif
+		
 		return -ENODEV;
 	}
 #endif	/* __ia64__ */
@@ -7462,6 +7499,10 @@
 	agp_bridge.free_gatt_table();
 	vfree(agp_bridge.key_list);
 
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
+	pci_dev_put(agp_bridge.dev);
+#endif
+	
 	if (agp_bridge.needs_scratch_page == TRUE) {
 		agp_bridge.scratch_page &= ~(0x00000fff);
 		agp_bridge.agp_destroy_page((unsigned long)
--- src-8.8.25-orig/lib/modules/fglrx/build_mod/firegl_public.c	2005-01-05 02:05:05.000000000 +0100
+++ src-8.8.25/lib/modules/fglrx/build_mod/firegl_public.c	2005-01-18 21:08:37.000000000 +0100
@@ -88,6 +88,7 @@
 #include <linux/smp_lock.h>
 // newer SuSE kernels need this
 #include <linux/highmem.h>
+#include <linux/pagemap.h> // for lock_page and unlock_page
 
 #if defined(__ia64__)
 #include <linux/vmalloc.h>